No it's not dead, well *it* is, but....

So you're probably wondering (the few of you that actually read this) what's been happening since the last post.

A lot of arguing with a circuit board.
A lot of arguing with VHDL.
A lot of frustration at things I messed up on the circuit board.

In short, I haven't managed to get so much as a recognizable reset pattern going yet. I think a lot of it is to do with shortcomings of the board itself. Here is the list of things I messed up:

• ATN not connected to PortaBit
• Tried to run a 25MHz max part from the 28.636 MHz clock.
• Insufficient power supply capacitors on the 1.8V and 3.3V lines
• No RC reset on PortaBit's MCLR line
• The JTAG port has no GND/VREF pins
• No connection from PortaBit to CARD_IN or WR_PROT on the SD connector
• Tantalum capacitors. sigh
• The shutdown pins on the 3.3V and 1.8V regulators are open - they should be connected to VIN
• HSYNC and VSYNC are apparently necessary. DE-only doesn't work, even though the datasheet says it should. Or it doesn't work at the specifications I need.
• The bus isolation resistor networks need to go. This is not a fault as such, but rather a design change that makes the board far easier.
• The resistor network footprints are impossibly spaced for their pads, making them insanely difficult to solder.
• The test point for 3.3V is actually connected to GND.
• No test points on any of the address bus pins, data bus pins or control signals. That has been a major hindrance to debugging with the logic analyser.
• EEPROM socket should be Through-Hole, not SMT. This one is a dev board preference. On the final board, the EEPROM will be soldered directly to the board. For removability, a socket is preferable. But the board was designed to take an SMT part, and SMT PLCC sockets are an arseache to solder.
• The TFT connector is backwards. More accurately, I used a bottom-contact connector, where as the TFT requires top-contact.

So in the next few days, I'm going to get these corrected, and get the new board respun in China. Perhaps then at least I'll be able to debug what's going wrong.